Dr. Ashiq Sakib joined Florida Poly as an assistant professor in the Department of
Electrical and Computer Engineering in August 2019. His research interest lies in
the field of Asynchronous Digital Design and Optimization. He has been conducting
research in this field for about seven years. In this time, he has gathered diverse
expertise spanning the areas of asynchronous logic design, circuit and architecture
level optimization, error-resilience, and formal verification. His doctoral research
focused on formal modeling and developing formal verification methods for different
Quasi-Delay Insensitive (QDI) asynchronous paradigms.
Sakib has taught Digital Logic Design, Embedded OS, Embedded Control, and Computer
Architecture and Organization at Florida Poly since fall 2019.
Before joining Florida Poly, Sakib worked as a research assistant, as well as teaching
assistant for courses on Digital Logic Design, Advanced Digital Design, Embedded Systems,
Computer Organization, and Electronics, in the Department of Electrical and Computer
Engineering at North Dakota State University from 2014-19. He also served as a guest
lecturer for multiple undergraduate- and graduate-level courses, such as Digital Logic
Design and Computer Aided Verification.
Sakib has also served as a reviewer for reputed journals, such as IEEE TVLSI, MDPI
Electronics, MDPI Designs, MDPI Mathematics, MDPI Machines, Journal of Circuits, Systems,
and Computers etc., and for technical IEEE conferences, such as ACM/IEEE Design Automation
Conference (DAC), International Symposium on VLSI (ISVLSI), Mid-West Symposium on
Circuits and Systems (MWSCAS), International Symposium on Circuits and Systems (ISCAS),
Asia Pacific Conference on Circuits and Systems (APCCAS), IEEE IEMTRONICS etc.
He is a member of the honor society of Phi-Kappa-Phi (PKP) and IEEE- Eta-Kappa-Nu
(HKN). He was also a Graduate Studies Senator in the Student Government at North Dakota
2021 Ablaze Award for Exemplary Services to Others, Florida Polytechnic University
Love of Learning award by the honor society of Phi Kappa Phi, 2018.
NSF Travel Award to participate in the Student Activities program, IEEE-VTS’17 conference
held in Las Vegas, 2017 (1 of 10 recipients).
Graduate Research Assistantship, National Science Foundation under Grant No. CCF-1717420.
Graduate Teaching Assistantship, Dept. of Electrical and Computer Engineering, NDSU.
Recognition for All-round Performance, Institute of Engineering and Management (IEM),
Ph.D. in Electrical and Computer Engineering, North Dakota State University, 2019
B.Tech. in Electronics and Communication Engineering, Institute of Engineering and
Management (IEM), West Bengal University of Technology (WBUT), 2013
Technical Program Committee, IEEE IEMTRONICS 2020, 2021
Faculty Adviser, Mu-Omega Chapter of IEEE-HKN at Florida Polytechnic University
Member, Institute of Electrical and Electronics Engineers (IEEE) and IEEE Circuits
and Systems (IEEE-CAS) Society.
Member, Association for Computing Machinery (ACM)
Member, The honor Society of Phi-Kappa Phi and IEEE-HKN.
Member of the CE Program Assessment Committee, ECE Curriculum Committee, Research
Committee, and Graduate Studies Committee at Florida Polytechnic University.
A. A. Sakib, S. Le, S. C. Smith, and S. K. Srinivasan, 'Formal verification of NCL
circuits' (Materials, Circuits & Devices, 2019), Asynchronous Circuit Applications,
Chap. 15, pp. 309-338, DOI: 10.1049/PBCS061E_ch15,IET Digital Library.
A. A. Sakib, S. C. Smith and S. K. Srinivasan, "Formal Modeling and Verification of
PCHB Asynchronous Circuits," in IEEE Transactions on Very-Large-Scale-Integration
(VLSI) Systems, vol. 27, no. 12, pp. 2911-2924, Dec. 2019.
A. A. Sakib, “Soft Error Tolerant Quasi-Delay Insensitive Asynchronous Circuits: Advancements
and Challenges," 34ᵗʰ Symposium on Integrated Circuits and Systems Design (SBCCI)
A. A. Sakib, A. A. Akib and S. C. Smith, "Implementation of FinFET Based Static NCL
Threshold Gates: An Analysis of Design Choice," 2020 IEEE 63rd International Midwest
Symposium on Circuits and Systems (MWSCAS), Springfield, MA, USA, 2020, pp. 37-40,
A. A. Sakib, and S. C. Smith, “Implementation of Static NCL Threshold Gates Using
Emerging CNTFET Technology,” in IEEE International Conference on Electronics Circuits
Symposium (ICECS), 2020 DOI: 10.1109/ICECS49266.2020.9294823.
A. A. Sakib, S. C. Smith, and S. K. Srinivasan, "Formal Modeling and Verification
for Pre-Charge Half Buffer Gates and Circuits," IEEE International Midwest Symposium
on Circuits and Systems (MWSCAS), pp. 519-522.
A. A. Sakib, S. C. Smith, and S. K. Srinivasan, "An Equivalence Verification Methodology
for combinational Pre-Charge Half Buffer Asynchronous Circuits,” IEEE International
Midwest Symposium on Circuits and Systems (MWSCAS), pp. 767-770.
M. Hossain, A. A. Sakib, S. K. Srinivasan and S. C. Smith, "An Equivalence Verification
Methodology for Asynchronous Sleep Convention Logic Circuits," 2019 IEEE International
Symposium on Circuits and Systems (ISCAS), Sapporo, Japan, 2019, pp. 1-5.